New Dynamic Random Memory Design And ZnO Nanowires / Si Heterojunction

This thesis is divided into two sections and mainly focuses on the topics of "Design of a novel Dynamic Random Access Memory (DRAM) cell based on Tunneling Field Effect Transistor (TFET)" and "Fabrication and Characterization of N-ZnO nanowire/p-Si Heterojunction", respectively.The first part focuses on the design of a novel DRAM cell based on TFET. The traditional DRAM cell consists of one storage capacitor and one switching transistor. However, as the device size shrinks, the capacitor cannot be over shrunk. So DRAM manufacturing faces the challenges of higher cost and worse performance. To solve this problem, we have proposed a novel DRAM cell design omitting the storage capacitor based on the application of TFET. We have demonstrated the function of the device by using2D technology computer assisting design (TCAD) tools. The operation current conditions, speed, potential changes in the floating gate, disturb and retention performances of the DRAM cell have also been studied. By employing the TFET, the write speed of the device can be as fast as2ns while the operation voltage can be relatively low. The current sense window can be as high as10’attributing to the optimization of device technology and structure. Moreover, the process flow of the novel DRAM cell is compatible with EEPROM, so that it can be more easily applied for embedded use.The second part focuses on the fabrication and characterization of n-ZnO nanowire/p-Si heterojunction. The material of ZnO has high carrier mobility for semiconductor applications. With the development of fabrication techniques,1D ZnO nano structures have shown even better performance in recent years. The research on the fabrication and characterization of ZnO nanowires on Si substrate is of great importance. In this thesis, we have studied different methods of depositing ZnO seed layer:dip-coating method and atomic layer deposition method. Then we studied the characteristics of ZnO nanowires grown on different types of seed layers by XRD spectrums. The growth employs the hydrothermal method. We have also investigated the influence of seed layer annealing on the ZnO nanowires and found that ZnO nanowires grown on amorphous seed layers have better quality. The characteristics of n-ZnO nanowire/p-Si heteroj unction have been investigated by analyzing the Ⅰ-Ⅴ test results under different test temperatures. Because of the optimization of seed layer technology and other technology process, the device has shown good performance of high on/off current ratio (as high as2519under303K), good reverse breakdown characteristic (with-33.5V reverse breakdown voltage) and high carrier injection efficiency.