Research On Parallelization Of Secure Hash Algorithm

Secure Hash Algorithm is the fundamental algorithm of cryptography, and is widely used for data integrity check, password save, document identification, pseudo-random number generator, digital signature, etc., with important application value. Common hash algorithm structure includes Merkle-Damgard structure, HAIFA structure, Sponge structure and wide pipe structure. An investigation of common hash algorithm structures shows that, on the whole they are linear, that is, message blocks are processed in order, processing of a later message block depends on the calculation results of the previous message block and cannot be calculated in advance. When the message length is large, linear structure becomes the bottleneck that limits the computational efficiency. It prevents a multi-core CPU from using multiple cores at the same time, so processing power of multi-core processors cannot be fully exploited. To solve this problem, the Skein algorithm defines a tree hash mode, which greatly improves parallelism of the algorithm.This article is dedicated to research of parallel processing architecture for tree hash mode. We take Skein algorithm as an example, through the work of algorithm analysis, system modeling and hardware architecture design, propose a tree hash parallel processing platform. The platform is made up of several processing engines, several memory units, and a controller, which are connected by a central switch network. Each processing engine can independently accomplish processing of linear hash algorithm. The controller dispatches tasks to the processing engines via the control bus. Processing engines cooperate to accomplish the operations of tree hash. The design of interconnection network allows many-to-many concurrent access, combined with the design of distributed memory units, makes it possible for multiple processing engines to access different locations of the storage system simultaneously. Overall, the design of the parallel architecture solves the three problems faced in parallel processing system design, which are storage, interconnection and task scheduling.The platform can not only efficiently accomplish the Skein algorithm, but also has universal significance for implementation of other tree hash algorithms, in the aspects of task partitioning and scheduling, memory system design, interconnection and hardware acceleration. The parallel architecture proposed in this paper has passed FPGA function verification, and is synthesized under TSMC65nm process. The synthesis results show that the system occupies area of1.3mm2, its maximum operating frequency as high as833MHz, with estimated power consumption of66mW, and achieve throughput of approximately40Gbps, the metrics meet the expectations. The study of performance improvement of parallel hash is another focus of this paper. A performance model of Skein tree hash is proposed in this paper according to the scheduling of tasks in the system. According to the model, in comparison with traditional linear hash, the speedup of parallel hash using multiple processing engines is approaching the number of processing engines, when the message gets long enough.