Hardware Research And UVM Verification Of Different Hash Algorithms

In recent years,with the development of artificial intelligence technology and the largescale commercialization of 5G technology,the Internet of Things industry has developed rapidly,and the development level of China's Internet of Things is also at the world's leading level.However,information security risks in the Internet of Things market have become more and more serious as the market grows.Therefore,the urgency of developing Io T information security has made the development of ASIC chips for Io T information security particularly important in the growth of the Io T market.The current encryption algorithms include international AES / RSA / SHA,etc.,and domestic SM2 / SM3 / SM4 algorithms;at the same time,many scholars and engineers have done a lot of work on the optimization and implementation of security algorithms.However,in actual applications,depending on the security level and nature of the application scenario,the algorithm requirements are different.In order to be compatible with the international encryption algorithm and the national encryption algorithm,this article was extracted from the design of an Io T information security chip that supports both the international encryption algorithm and the national encryption algorithm.The hash algorithm is compatible with the international encryption algorithm and the national encryption algorithm.The encryption algorithm is researched and implemented.There are many types of existing international hash algorithms.Combined with the actual needs of the project and the development of hash algorithms,the international hash algorithm uses SHA256 and the national secret algorithm adopts SM3 as the research and design content of this article.SHA256 is the most widely used and studied.It is relatively mature to use;SM3 encryption algorithm is proposed by China National Cipher Bureau,and its algorithm still has optimization space in terms of hardware implementation;based on the above,the main work of this paper includes software and hardware collaborative design of SHA256 / SM3 algorithm.At the same time,UVM verification technology has been widely used in So C design;this paper builds a UVM verification platform based on the IP level verification of the SHA256 / SM3 algorithm to verify whether the RTL implementation of the SHA256 / SM3 algorithm is-consistent with the function of pure software.At the same time based on smart L platform to complete system-level testing and FPGA prototype verification.First,the SHA256/SM3 algorithm is implemented through software,and the UVM verification platform is built at the same time,and the SHA256 / SM3 algorithm implemented by the software is used as a reference model for the verification platform,and then the SM3 algorithm is optimized.The optimization index is to reduce the number of registers to The original 1/3,the performance is improved by 28.9%,and then the SHA256 algorithm and the optimized SM3 algorithm are implemented by RTL.Finally,the SHA256 / SM3 algorithm circuit is connected to the CPU through the AHB bus interface,and finally a So C is formed.After the design is completed,the IP level verification of the algorithm is first completed with UVM.From the scoreboard of UVM,the results obtained by the data through the DUT and the reference model are consistent,and then the coverage of the UVM platform is analyzed.It can be observed that with the test case The increase of the function coverage and code coverage gradually tends to 100%.Then complete the system and simulation under VCS,and the results can meet the design expectations.Finally,FPGA verification is completed on the FMX7 A development board provided by Pingtou,which verifies that the prototype verification fully meets the design requirements.In summary,this design solution fully satisfies the complete information needs of the Internet of Things.