Research On Design And Implementation Of 65nm Embedded FPGA Oscillator

The program download module of high performance FPGAs need high quality clock input to make it work. Replacing crystal with internal clock oscillator implement by Standard CMOS process is helpful to reduce the cost of the FPGA and improve the degree of integration of the FPGA. To increase functions of65nm FPGA and provide different clock frequencies for program download module, We design a clock oscillator that can output different frequency to program download module,In this paper, we give out detail designs of sub-module circuit of the oscillator such as VCO, temperature compensation circuit, divider circuit. We use temperature compensation circuit to solve the problem of temperature and process variations in traditional oscillator. We take use of the the positive correlation between the oscillator and temperature and the negative correlation between temperature and frequency. By the temperature compensation circuit design and layers of formula derivation and simulation, we make VCO control voltage positive correlation with temperature Thereby performing a frequency temperature compensation. Also in this paper, we add programmable control resistor module to control the voltage of VCO. Thereby increasing the output frequency range of the oscillator. Eventually through continuous circuit simulation, parameter modification and optimization, we achieve good temperature and process compensation in all eight different output frequency at the same time.In this paper, a oscillator with temperature compensation and process compensation is designed with65nm digital process and analysed with Cadence. This oscillator could work without regulator and with power supply voltage variation±10%. In this paper, the oscillator can work in temperatures from-55℃to125℃and with voltage from1.08V to1.32V. Also, it works properly in the case of TT, SS, FF with little variation in frequency when the temperature and process corner change. The output of oscillator varies in±5%when temperature and process change. The simulation results show that the function and performance of frequency of this oscillator are able to meet the requirements of clock for FPGA programming download module. In the case of1.2V Supply Voltage,27℃temperature and TT process corners, In front end emulator, the oscillator output frequency range of93MHz-331MHz. In back end emulator, the oscillator output frequency range of 67MHz-90MHz,134MHz-181MHz, The noise at1MHz is-95dBc/Hz, The area of layout is400um×85um, The power consumption is2.3mW at1.2V supply voltage.