Cmos Rf Active Integrated Mixer Analysis And Design

The recent surge of various wireless communication systems has brought more aggressive design goals for radio-frequency (RF) receiver: low power dissipation, low cost, small form factor and high integration level. In all types of RF front-end architectures, zero-IF possesses a simple topology and high integration level compared with heterodyne and image-reject architectures; therefore, it has become the topic of active research. Zero-IF receiver failed to lend itself to practical applications owing to limitations in discrete implementations. Now its realization is possible as a result of the gradually improving IC technology. In all kinds of IC processes, CMOS process is compatible with both digital and RF circuits, and its cost is pretty low, which makes it the best choice for high-integration system design.The performance of RF receiver system will be seriously affected by the noise characteristics of its mixer; to optimize the system design, the analysis of mixer's noise characteristic is worthwhile. Since CMOS active mixer is widely used in RFIC, it will be the main topic of this research. Based on linear time-varying theory, impulse sensitivity function (ISF) was introduced to elucidate the mechanism for noise transformation in mixers. Every noise source in mixers was analyzed systematically and explicit expression of noise figure was presented.Based on numerous references, this thesis finally designed one direct conversion mixer working at 2.4 GHz. With a traditional active double-balanced mixer as a core schematic, common-mode feedback (CMFB) and differential-mode feedback (DMFB) are employed to suppress the DC offset. Designed with 0.18μm CMOS process, simulation results showed 11.3 mW power dissipation with 26 dB conversion gain, 10.5 dB noise figure, and 6.54 dBm IIP3.The research of this thesis can be a good reference of the RFIC design.