Research On Usb2.0 Bus Controller Fx2 Structure Principle And Application

USB (Universal Serial Bus) is a kind of flexible and compact bus, which has high transmission rate and shared interfaces. It is a standard interface used in connecting PC and peripheral equipment in engineering fields, which supports plug and play and hot plug.However, due to the technology and protocol of USB interface is too complicated, in order to make the USB-related design simple, and promote the interface technology, many manufacturers have launched their own different styles of chip series. Consider about the overall package of resources provided by different companies, Cypress EZ-USB series chip should be the best USB bus controller chip, and EZ-USB FX2 (CY7C68013) is the best one with high adaptation.Except for a super USB2.0 SIE engine, EZ-USB FX2 chip also integrates an enhanced 8051 core improvements, FIFO, GPIF and other modules. The chip helped developers complete 80% to 90% of the communication work, which allows developers can successfully develop USB peripherals without a deep understanding of the USB protocol.This paper focuses on studying the structure characteristics of Cypress CY68013 chip. This design completed software, hardware and firmware configuration of EZ-USB FX2 chip, proposed a control and data solutions between FPGA and PC based on EZ-USB 2.0. This design achieved high-speed data transmission by using SLAVE FIFO model of EZ-USB FX2, and achieved PC control based on VC++. This design achieved control commands transmission by using I2C channel, which can be set in FX2 8051. The proposed solution offers a high-speed data communication channel combined with a separated control mechanism based on I2C, and is promising for FPGA applications with EZ-USB 2.0. In order to verify the reliability of this solution, this design built an 8-bit digital data capture and playback platform to verify the reliability and stability of this channel. Finally, the results show that the proposed design effectively offers high rate and credible communications between the FPGA and PC through USB2.0.