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Design Of Digital Down Converter

Posted on:2011-12-17Degree:MasterType:Thesis
Country:ChinaCandidate:H LiuFull Text:PDF
GTID:2178360308957147Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Software Defined Radio is one of the hotspots in the current military and mobile communication research. It was proposed in the early 1990s and has universatility, openness, reconfigurability, and many other advantages. At present the hardware condition has not been able to realize the ideal software radio, the compromise intermediate frequency (IF) band-pass sampling architecture is used in SDR, therefore digit down conversion technology should probably be born. Thus it is highly significant to research the digital down conversion technology.Generally traditional digital down converter is constituted by DSP processor or ASIC, but these chips are either difficult development or expensive. FPGA has duplicate programs, highly speed, low cost input and so on, more and more popular in the industry. With the development of microelectronic technology and application of high performance FPGA, we must develop digit down converter based on FPGA technology.After a depth study on the Communication System and Theory, Digital Signal Processing, Multisampling Signal Processing, the method of using FPGA technology to realize digital down conversion is deeply researched. Main critical modules have already been realized using the FPGA design method. These modules are the Numerical Controlled Oscillator, the cascade integral honeycomb filter, half belt filter and the reshaping filter. These modules are Numerical Controlled Oscillator, Cascaded Integrator Comb filter and Shaping filter.Design tools used in this topic are Matlab, ISE8.2i, ModelSim, Cadence SPB15.7 and Protel DXP2004. In the software design, the filters used in the digit down converter are designed by the Mathworks Corporation's MATLAB. Then with the Verilog HDL language programming, and uses the integrated development environment ISE8.2i compiled. At last simulation and validation are carried by ModelSim SE6.1f environment.We use Cadence SPB15.7 software to carry on the schematic diagram design and use Protel DXP2004 to carry on the printed wiring board design.
Keywords/Search Tags:DA, digital down convert, FPGA
PDF Full Text Request
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