Research On Software Radio Digital Down Convert Module And Implement Based On FPGA

Software radio carries out each kind of function by software on hardwareplatform composed of general PLD or digital signal processor. Software radio isone of research hotspots in mobile communication. In order to digitize the analogsignal as early as possible, it is required to make A/D and D/A converter be as closeto RF antenna as possible. However, it is difficult to realize RF signal digitalizationat the current device development level. Thus, the prevalent choice is to makeanalog IF signal digitalization and convert IF signal to baseband by using digitaldown covert (DDC) technology, accomplishing digital signal processing inbaseband. The DDC technology is one of the most important technologies in thesoftware radio. The DDC in software radio system can convert IF signal tobaseband, reducing the rate of data flow and sending the low-speed data to DSPdevices for processing. Being a bridge between the ADC and the DSP devices, DDCwill have direct impact on stability of software radio system.In this thesis, the current status of research on DDC technology at home andabroad is analyzed. The theory on which DDC technology is based is described andarchitecture and feature about DDC system is presented. In-depth study on thenumerically controlled oscillator (NCO), CIC (Cascaded Integrator Comb) filterand FIR filter in the DDC module is made by implementing mathematical modelsimulation, optimization in MATLAB. Two methods based on look-up table (LUT)and coordinate rotation digital computer (CORDIC) algorithm for implementingNCO are presented. The result of simulation and synthesis show that the NCObased on CORDIC algorithm is proved to be superior to the other one. To reducethe hardware overhead, the CIC filter is designed using a common design datawidth of each level of the circuit. A distributed algorithm is used to implement thedigital low-pass filter, and large-scale look-up table is optimized to save hardwareresources and improve the computational efficiency.In three representative hardware schemes for implementing DDC, using FPGAto complete the design of DDC is great of advantage. In the thesis, theimplementing technology of the DDC in software radio system based on FPGA isexplored. The arithmetic analysis and optimization for main module is completedand circuit design, timing simulation and verification is implemented by using Modelsim and Simulink co-simulation and verification environment. Theexperimental results show that hardware design is consistent with the idea ofalgorithm. The further optimization is implemented to reduce hardware resourceoverhead and the length of clock cycle. The system-level simulation will beexecuted.