An Investigation On The Dependence Of Symbolic Simulator Small Signal Models And Application For Improving Analog Design Yield

Analog circuit sensitivity to process variation and design yields has always been key issues that designers care about. Due to the limitation of numerical simulation method, there still lacks a design automation tool that helps analog circuit designers choose optimal parameters for robust circuit performance in design community. Symbolic simulation method could rapidly derived frequency design metrics with respect to symbols of circuit parameters. By the proposed methodology with the GUI supported symbolic tool in this paper, it can provide the designers an easy yet efficient design assistance to achieve the yield related design tasks.This paper first introduces fundamentals of symbolic simulator. Then it describes the CMOS small signal model selection and extraction due to the necessity of trimming simulating circuit scale. The design methodology for multi-stage Op Amp and principle for low sensitivity and high yields circuit design are illustrated later. On the basis of the above fundamentals, a representative design case is employed to demonstrate its practical meaning and enhancement to designer. Experiments show that the methodology proposed in this paper could efficiently aid analog circuit designer on circuit parameter judgment and selection. This is a worth implementing method in practical analog circuit design.