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New Progress Of Symbolic Simulator Applications On Cmos Analog Circuit Design Automation

Posted on:2011-05-06Degree:MasterType:Thesis
Country:ChinaCandidate:D M MaFull Text:PDF
GTID:2198330338984514Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
A symbolic calculation method based on the symbolic analog simulator for the sensitivity of frequency response to semiconductor device sizes is addressed for application in analog integrated circuit design in this paper. The transistor size-based ac-sensitivity can be used for sizing devices and understanding the circuit behavior. Examples are provided to demonstrate that a design platform supported by symbolic ac-sensitivity and visualization can be a helpful tool for computer aided design if analog integrated circuit.The thesis is organized as follows. A brief introduction to the history and algorithm of symbolic simulator is in Chapter 1 and Chapter 2. The algorithms and implementations of symbolic sensitivity to device sizes are presented in Chapter 3. In Chapter 4, the symbolic analog design simulator platform is introduced. Example cases and applications are demonstrated in Chapter 5. Discussions on symbolic ac-sensitivity under different working region of transistors are presented in Chapter 6. Conclusions and future work are reported in Chapter 7.The symbolic ac-sensitivity calculation in this thesis is probably the first on to reveal the connections between the sensitivity and the circuit behavior properties, such as the pole-zeros and the dc gain. It will probably help to promote the analog design methodology and automation.
Keywords/Search Tags:Analog Circuit design, AC-Sensitivity, Binary Decision Diagram (BDD), Device Sizing, Pole-Zero Analysis, Symbolic Simulation
PDF Full Text Request
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