Design And Implementation Of JTAG-Based Test Platform For Embedded System Hardware

With the rapid development of embedded system technology, they are used more and more widely, their function become more and more complex and hardware integration become biger and biger. Due to the exclusive design, there is no one universal test platform for all embedded system hardware. Joint Test Action Group designed a common chip boundary-scan structure and test access port criterion which is called JTAG standard to support testing on-board chip or logic. But the JTAG test mainly focus on chip or on-board logic and the connection test, reset and system debugging at circuit board level, while the functionality of the entire hardware system isn't too much concerned now. The test platform which is designed and implemented in this paper is put forward to test the hardware functionality of embedded system.This paper base on JTAG and take the hardware board of earthquake data acquisition station system as test project, design and implement the JATG-Based test platform for embedded system hardware. Mainly includes JTAG structure, hardware (ARM, microcontroller, SRAM, FPGA, etc) function testing, serial driver, display and control procedure. By on-line emulator to connect the test platform and the embedded system hardware, the device can be tested excluded the effect of software (without loading operating system, without loading embedded applications) and the interference factors can be maximum filtered.This test platform can be used to test functional integrity and availability of the hardware according to demands and achieve the purpose of fault location and single-board testing. It can be conveniently deployed, easy to operate and log in pratical applications. Although this test system is designed for acquisition station board, the testing theory also can be extended to other embedded systems.