The Design And Implementantion Of Embedded SOC Debugger Based On M8051

As the increasing density of the chips, traditional ASIC's independent module is not contents the current demands, so it comes forth with SOC. The SOC includes the software and hardware, and it can improve the performance of the system. So the traditional electronic system design has changed a lot, the on board debugging system is replaced by the chip debugging system, and it becomes more difficult for debugging, especially for the software debugging. After the SOC chip is tape out, the system debug is mostly the software debug, so the convenient debugger is very important for the development of system.In the same time, the 8051 is used widely as micro controller, and it is used in most of the SOC chips. Mostly, Bei Jing Embedded System Key Lab has the IP core of 8051, and a lot of chips based on it. In this paper, we will build a low-cost debugger, which is convenient for software debug, and decrease the cost of the production.In this paper, the target system is the 8051 SOC, and the 8051's debug interface is OCI. The host system's compiler is Keil C, which is the most popular compiler for 8051 develop. Choose the Keil C is accord with most of the users. As the cost of the sytem, compared many ways of PC communication ways, at last the IIC is chosen as the communication between PC and debugger.In this paper, there are software design and hardware design. In the software design, for making the hardware decode the JTAG command easier, and transmit with additional 8 bits information signal for the hardware, and this will improve the decoding of hardware. At the same time, devide the software into 3 layers, this will make the software code is easy to maintenance. For the hardware design, it offered two registers for software: Instruction Register and Data Register, this will be more convenience for the software design.In the last of this paper is the verification of hardware simulation, which includes all the request debug features. And at last we test the software and hardware with FPGA, and test the debug features for the debugger, it can finish the debug by this debugger, and reach the aim of this paper.