Video Monitor Processing System Research And Realization Based On H.264

H.264 standard is the next generation video compression standard, which is under the development of the International Organization Telecommunication Union together with the International Organization for Standardization. H.264/AVC video compression standard adopts many new technologies, such as integer DCT transform, multiple reference frame motion estimation, multiple macroblock partition mode motion estimation, and the best coding mode ,which used rate distortion optimization techniques. However, multi-frame, high accuracy motion estimation and rate distortion optimization technology improved video quality but with the complexity of the encoder increased a lotTMS3206416 of TI is a special designed 32-bit fixed-point DSP chip for the development of multimedia applications, which is a strong current computing power digital signal processor, can satisfy the requirements of the video signal processing. Therefore, in order to play TMS3206416 high-speed processing and improve the efficiency of the software implementationthe, study on special hardware and software of TMS3206416 has important practical value.This paper includes four parts as follows:First of all, this paper starts with a research for the H.264/AVC video compression standard and a summary for principles of motion estimation, and then we goes with for a discussion for the threshold detection method of the all-zero block detection technology, a calculation and a derivation of the all-zero block threshold value. Finally, a better measure of improving maximum threshold decision is shown.Next, based on the inter frame mode decision algorithm, this paper analyzs the structure of subjective image similarity matching criteria in detail and improves the price function of the corresponding mode decision. Then, combined the structural similarity of the matching criteria with the best threshold of the all-zero block as the early termination criterion, we proposes an improved fast mode decision algorithm.Thirdly, in the video processing DSP platform, we discuss core structure and peripheral equipment of the TMS3206416 chip. Then integrated with the characteristics of TMS3206416 embedded systems, this paper analyzed the program-level code optimization and assembly level optimization approach. It centers on the pipeline, loop unrolling, instruction parallelism, data packaging technology, and introduced some special single-instruction multiple data stream instructions; studied how to use SIMD (Single Instruction Multiple Data) instructions and optimized SAD module, DCT module.Finally, according to the experimental results, we can conclude that the improved fast mode decision algorithm can significantly reduce coding time in the case of maintaining a good video quality. Instructions in parallel, pipeline and other methods can be used to optimize the bottlenecks functions which effecting encoding speed of H.264, and it reached to a better optimization results.