Parallel Dsp-based Digital Beam Formation Processor

This thesis is focused on the study of DBF processor. The main tesk of the thesis is to design and implement a new DSP platform which is based on 4 piece of ADSP-TS201S. The new DSP platform has some new function and deal with the bottleneck of high speed data transmission. Significant results of the work include:(1) With comparing several popular DSP+FPGA configuration, a hardware implementation scheme of DBF processor based on 4 ADSP-TS201S DSPs is proposed.(2) Schematic circuit diagram and printed circuit board(PCB) are designed. Four ADSP-TS201S DSPs and a Virtex-4 FX60 FPGA are integrated on a standard PCB . The circuit contains standard CPCI bus, Fibre Channel and high density SDRAM. The design is accomplished on the platform of Allegro SPB15.5.(3) Some high-speed circuit design rules are successfully applied to PCB design to achieve the high-speed performance.(4) The simulation of the SLCMV adaptive algorithm have carried out on this platform.