The Optimization Of AES IP And Research On Side Channel Analysis

With the development of information technology, the information has become more and more important, and using cryptographic algorithms to protect sensitive information has become a very common method. The Advanced Encryption Standard (AES) issued by the National Institude of Standards and Technology (NIST) of the USA in 2001, is supposed to replace DES, and has become the new widely-used symmetric block cipher standard. In order to design a small area IP, a composite filed S-Box is implemented on GF (22) and also resource sharing is fully employed by using common subexpression elimination. Besides the optimization of AES IP, this IP can be configured in a variety of modes, such as ECB, CBC, CFB, OFB and CTR. The security of the system is increased and the speed of encryption is maintaining while using these modes.In recent years, the technology of the Side Channel Analysis has developed rapidly. When the smartcard is executing the encrypt operation, side channel information will leak through the variation of power signal, a countermeasure has been suggested to protect implementations of AES algorithm in this paper. We select an 8-bit microprocessor to take place of the smartcard and implement the AES algorithm, DPA attack is carried out on AES smartcard when executing AddRoundKey operation. And at last a masking technology is proposed to protect the AddRoundKey operation to the differential power analysis.