Implementation Of Radar Signal Processing By Model-based FPGA Design

With the widely use of field-programmable gate array (FPGA) in industry, implementation of digital signal processing based on FPGA holds an important position in radar signal processing. Model-based FPGA logic design is a top-down rapid prototyping method, which not only lowers the threshold for FPGA design, but also shortens the development cycle and improves design efficiency. This makes the model-based FPGA logic design be the trend of FPGA design. To achieve the model-based FPGA logic design of radar signal processing, this paper launches the research in the following several aspects:Firstly, the model-based FPGA logic design method is studied, the status and trends of the model-based FPGA logic design is presented. And the model-based FPGA logic design software tools—System Generator and AccelDSP used in the paper are introduced. Then the FIR filter is designed by the model-based FPGA logic design method and the RTL (register transfer level) design method respectively. And then the advantages and disadvantages of the model design method and RTL design method are analyzed intensively.Finally, the basic principles of radar signal processing are introduced, and the model-based design of digital down conversion (DDC), pulse compression, moving target indication (MTI) and the constant false alarm rate (CFAR) processing are achieved by using System Generator. Then the function is verified in Simulink, and the timing RTL simulation of the HDL code is carried out on the Xilinx FPGA.