Water Edge Plasma Clean Technique And Process Optimization

With rapid development of ULSI technology, film stack becomes more complex than before. Film stack will easily delaminate at wafer edge with the changes from more complex and thicker film structure. For one 300mm diameter wafer, the region in 20mm wafer edge exclusion contains 25% of whole wafer's chip amount. Therefore whole wafer yield will be affected by wafer edge defect. Once film stack peels at wafer edge, flaking defect will be transferred to wafer center by flowing liquid in wet clean process, and then yield of wafer center area will be impacted by this defect.Plasma bevel clean is uniquely designed and used in plasma clean at wafer edge area in the experiment. The etch rate distribution curve profile and selectivity into varies film materials can be modified with adjustment of process parameters e.g. PEZ ring diameter, power, gap and process gas component. In experiment and semiconductor manufactory, wafer edge defect distribution can be clarified, and suitable PEZ ring size can be selected by together with optical inspection and wafer edge defect scan. Wafer edge film structure can be inspected by cross section SEM then process condition can be selected. Process time. also can be calculated by etch rate measurement with selected process condition. Optical inspection, cross section SEM inspection and wafer edge defect scan need to be repeated when test wafer is etched. With the procedure upon, process setup is completed. After process setup completion, split experiment and risk mass production are required to verify the benefit of defect reduction and yield improvement via bevel clean insertion.