0.18 Microns Mim Etching Edge Of Wafer Yield Improvement

With electronic systems developing towards smaller,higher-speed,more functions and more capable. To satisfy the market. IC manufacturing company should improve yield more rapidly. The manufacture cost should be lower and the product will be more complex. Yield problems not only for the marginal cost of waste, and is not conducive to the company’s competitiveness in the market.In this thesis monitor defects during process steps and uses failure mode analysis method,studies reasons which cause 0.18um wafer edge low yield,provides corresponding solutions,makes yield improve obviously, the main job in this thesis as below:First, for MIM metal (1.3K AL)deposition,from inline defect trace and FA for yield NG wafer, finds in process of AL deposition,high power recipe will cause arcing around PAD, By modify recipe use low power (2K) improve defect and gain about 2% yield.Second, After MIM metal etch, check MEM remain OX at wafer center and edge,combine with chamber etch rate, and depend on defect result, it’s best way to improve defect by add OE time 11 S,and also gain about 2% yieldThird, After MIM bottom metal etch, check defect by FA of yield loss wafer,find TIN residue at bottom of metal Line.By experiments and analysis, change BT step process mode,from by time etch to by endpoint etch, improve yield about 4%.Base on analysis result, it’s very difficult to improve wafer edge low yield issue by just improve one step condition. Best multi condition is:MIM DEP use low power(2KW) process,MIM ETCH OE time add 11S,MIM bottom metal etch BT step etched by endpoint. After use final flow to run product,no wafer edge low yield issue occur.In this thesis,through improve about MIM process, solve wafer edge low yield issue, improve product average yield level about 8%.Lower wafer cost,enhance competitiveness in the marketing,produced enormous economic benefits.