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The Research Of Allocation Method Based On Low Power In High-level Synthesis

Posted on:2011-07-07Degree:MasterType:Thesis
Country:ChinaCandidate:F WuFull Text:PDF
GTID:2178360305483139Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the development of fabrication, the capacities of application-specific integrated circuits (ASICs) that implement data-intensive applications are increasing as well. In high-level view, the results of functional units (FUs) and register allocation have a significant impact on power, thermal, area and timing etc., especially for data-dominated behaviors. Techniques for power minimization might be applied in different levels of the design hierarchy, but high-level synthesis (HLS) has attracted a special attention due to its inherent ability of better design space exploration. All kinds of methods for register optimization are presented in the recent years. This thesis presents a new synchronous FUs and register allocation method, which combining heuristic list scheduling algorithm and left-edge algorithm to optimize the register number and the power. The experimental results show that different FUs allocation results deliver an average 1.83 reduction in register number. And compared with traditional allocation method, we can obtain a 5.81% reduction in power consumption. In order to optimize area with the design demand, it will be at the expense of power dissipation, our design method also can achieve power-area balance.Our special contributions in this thesis are as follows.●A compound cost function is used to evaluate the final power-area tradeoffs results, we can find optimal solution under certain target power and area ratios. To adjust power and area ratios, different optimal tradeoffs values can be obtained according to design requirements.●Synchronous functional units and register allocation method is applied, which can make the FU allocated to each type of operation be rational and the register number be small. Simultaneously, it can achieve low power with relatively small area of the final design.●The combination of heuristic list scheduling algorithm and left-edge algorithm is employed, the results of heuristic list scheduling algorithm are applied to conduct the register optimization with the left-edge algorithm.The results of the FU allocation and power optimization, not only good efficiency and meet the performance requirements in high-level synthesis, but also can conduct the optimization methods of floorplanning and routing of physical design. So the research of allocation methods in high-level synthesis is meaningful and useful.
Keywords/Search Tags:High-level synthesis, Power, Register, Synchronous allocation, Power-area tradeoff
PDF Full Text Request
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