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Optimization And Real-Time Realization Of AVS Vedio Coding Algorithm Based On DAVINCI

Posted on:2011-09-06Degree:MasterType:Thesis
Country:ChinaCandidate:L N JiaFull Text:PDF
GTID:2178360305471905Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
AVS is the second generation source coding standard with independent intellectual property of our own country. The second part of it has been authorized. AVS has the same coding efficiency as the international standard-MPEG-4/H.264 and the superiority of simple computational complexity and low patent licensing fees. Real-time realization of AVS encoder is pivotal for the application of AVS in the field of video and audio domain.At present there are three primary methods to realize the video encoding algorithms, including encoding by software running on PC and system based on ASIC and embedded system based on DSP. However, because of the excellent calculating ability and flexibility, DSP systems become the dominating scheme to implement the video encoding algorithms gradually. The purpose of this paper is to optimize the AVS encoder on the davanci TMS320DM6446 which has predominant performance and improve the speed of frame to meet the request of real-time video coding. The main tasks finished in this paper are as follows:The paper researched the coding algorithms and key technique of AVS, studied the characteristics of TMS320DM6446, establishing the foundation for optimizing encoder.Combining with the character of small and rapidness on the DSP, the holistic coding flow of AVS had been changed, including detaching I frame and P frame and disjoining the codes of disposing luma and chroma to make the codes executed linearly according to microblocks on the limit resources of DSP. Finally finished entropy coding according to frame. The paper minished search scope in motion search of inter frame at the cost of low reduction of PSNR. Thus, complication of realize it on DSP was reduced.The efficiency of encoder is mainly dependant on the efficiency of every modules. So one of the emphasises of this paper is to provide solutions for the kernel modules according to the features of every one with the purpose of improving the frame rate of encoder. On the arithmetic optimization, this paper adopted all zero block judgement ahead, skip mode judgement ahead and fast searching meathod of inter frame and so on. On the codes optimization, it adopted the character of DSP cache and allotted the memorizer rationally to improve DSP cache hit rata. Besides, the paper optimized every modules deep from C language, linear assembly and assembly respectively.Through all optimization mentioned above, the AVS video coding frame rate of I frame in the format of D1 reached 15.23 fps, while the frame rate of P frame reached 7.35 fps. If the time of entropy coding was taken out, the frame rate of I and P was 32.12 fps and 15.52 fps respectively.
Keywords/Search Tags:AVS, TMS320DM6446, Linear assembly, Assembly optimization
PDF Full Text Request
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