The Design And Realization Of STBC Based On FPGA

With the third generation mobile communication systems (3G) stepping forward to commercialization, and the development of ultra-Three (Beyond 3G) or so called the fourth generation (4G) mobile communication system, the demand for a higher rate, greater capacity and better service quality of communication system is growing. On the other hand, the availability of radio spectrum resources is limited. If the utilization rate of the communication spectrum does not significantly increase, it is impossible to meet current and future communication in these requirements.The most effective way to improve the quality and data transmission rate in the wireless channel is to use multiple input multiple output (MIMO) technology. MIMO technology can completely improve the capacity and spectrum efficiency of the communication system in the condition that the bandwidth does not increase, so MIMO is the key technology of the next-generation wireless mobile communication systems. One of the effective way to implement MIMO is to use the space-time coding techniques. The space-time block code (STBC) based on the orthogonal theory has become the mainstream technology code of the third and fourth generation mobile communication, because it has a relatively simple linear encoding and decoding structure, high spectrum efficiency, and can improve the anti-noise performance of the communication system in fading channel environment.This thesis firstly introduces the characteristics of the wireless fading channel, and analyzes the encoder and decoder principles as well as the algorithm of the space-time block coding, then proposes the design scheme based on field programmable gate array (FPGA), and implements the space-time block coding with two transmitting antennas and two receiving antennas in using of FPGA. In addition, this thesis performs the simulation analysis for the base-band performance of the encoder and decoder of STBC. Finally, the simulation results prove that this program can complete the encoding and decoding functions of the space-time block code well and the scheme of using of FPGA to realize the space-time block code encoding and decoding is feasible.In the sight of the development, most of the research done on STBC systems has been of theoretical nature, however, there is a little references about how to achieve this advanced coding technology on the basis of the hardware, in particular, the references of FPGA-based is few, therefore, the exploration and innovation in this thesis is helpful for the implementation of STBC on using hardware, which has great significance for the space-time block code using in practical engineering applications.