IP Core Design And Application Of AMBA Bus-based SoC

With the rapid development of large scale integrated circuit and information technology, the System on Chip (SoC) technology has caught unprecedented attention. In the SoC design, on-chip interconnect bus can connect functional modules together and make the Intellectual Property (IP) core design, migration and reuse easier. Developed by the ARM,Advanced Microprocessor Bus Architecture (AMBA) has become one of the most popular industry-standard on-chip bus architecture. In the AMBA system, the Advanced High performance Bus (AHB) can provide high performance and speed for communication between functional modules. After the on-chip bus being selected, the design and reuse of IP core become the core of SoC technology. Its verification is also of great importance.After introducing the AMBA bus protocol in details, this paper designed a FIFO interface module and a static memory interface module according to the AMBA protocol and a clock management module for the chip. Both functional verification and timing verification have been done in the software platform for each IP core. Then the functional testing, high and low temperature testing, and radiation testing have been done in a hardware platform after the IP cores and other functional modules were integrated into a SoC. The paper also designed several applications for the SoC. The first program realized plug-line programming of the off-chip nonvolatile memory, so that the on-chip processor can boot from the outside firmware. Then the output and collection of the wavelet coefficients which obtained from the chip's wavelet transform were completed. Finally a preliminary design to achieve source coding and channel error-correcting coding right in the same chip was made.