Soft Verification Platform Design Of I2C And DMA IP Core

With the development of complexity and scale in IC(Integated Circuit) design, the technology of SoC (System On Chip)design based on the IP(Intellectual Property) core reuse become the most popular. And the method of IP core verification is more concerned by the industry. How to choose an appropriate method of IP core verification has been the primary issue for many chip design corporations.Based on the study of current verification methods and techniques, in this thesis a method of IP core verification is proposed for the purpose of functional coverage and code coverage, based on the constrained random stimulus. It is a transaction level method, and focus on building BFM (bus-functional model) and functional coverage models. With the complete stimulus and the standard coverage targets that meeting the certification requirements of the programs, the IP core verification process has been accomplished.In the verification process, the code coverage is applied for the efficiency testing of the implementation of verification code,and the functional coverage for the efficiency detecting of the implementation of the code function. The combined analysis of functional coverage and code coverage in the verification process can improve the efficiency and reliability of IP core verification. In this thesis, the coverages of the I2C and DMA verification have made a good result. The I2C got 100% effective code coverage, and its functional coverage reached 98.5%. The effective code coverage and functional coverage of DMA both reached 100% as well. This verification laid a good foundation for system-level verification later, and reflects the good practicability.