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A Self-reconfigurable System Design Of Dynamic Instruction Set Computer CPU

Posted on:2010-10-03Degree:MasterType:Thesis
Country:ChinaCandidate:H QuFull Text:PDF
GTID:2178360302460341Subject:Circuits and Systems
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The Dynamic Reconfiguration Technology provides enough technical support to achieve high-performance general-purpose CPU system in resolving the application of diversity issues, meanwhile meeting the enhanced on-chip resource utilization, reducing the complexity of the design, cost and power consumption. The dissertation describes the development of CPU and the technical advantages of dynamic reconfiguration of the processor system, combines the Dynamic Reconfiguration Technology with the general-purpose CPU technology, and achieves the support for multiple SSE (Streaming SIMD Extensions) Instruction Set of Dynamic Instruction Set Computer CPU (DISC_CPU) on a single-chip FPGA.The dissertation designs the integer part of the Intel SSE Instruction Set computing Reduced Instruction Set Computer CPU (RISC_CPU). Firstly, Different RISC_CPU is designed due to different SSE instruction, secondly, dynamically self-reconfigurable DISC_CPU is designed based on Dynamic Reconfiguration Technology, finally, the process of the different instruction sets dynamic self-reconfiguration is verified on the Virtex-II Pro development platform, so is the feasibility of the design method, laying the foundation for the realization of dynamic instruction set computer design.By the analysis of the design results of the DISC_CPU self-reconfigurable architecture, the following conclusions are presented: (1) a reconfigurable region is time-division multiplexing shared by a number of RISC_CPU which helps increasing resource utilization on-chip; (2) each RISC_CPU can be designed individually with no intersection which lowers the complexity of the design; (3) when the system is running, RISC_CPU not used doesn't take up resources with the static power consumption of the system reduced; (4) the reconstruction files used in the system configuration are stored in the CF card. When the system functionality increases, the upgrade of the system can be achieved by the increase of the configuration files, thus the design cycles can be shorted as well as the design cost reduced; (5) DISC_CPU based on self-reconfigurable technology will meet the demand for shortening the cycle time of the modern CPU design and updating changes satisfy the purpose of designing the high-performance general-purpose processing chip.
Keywords/Search Tags:Dynamic Reconfiguration, Self-reconfigurable, Dynamic Instruction Set Computer CPU (DISC_CPU), SSE Instruction Set
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