The Research And Implementation Of The Floating-Point Divider Unit In X Processor

The unit of floating point division is one of the most of the core components of high performance micro-processor, and its speed usually becomes the bottle-neck of a micro-processor's performance. So the research and design of high performance micro-processor's floating point division unit have great and important value in real applications.The research results of this paper mainly contain several points.1. Analyze high performance algorithm for floating point division operation; design and implement 4-radix SRT floating point division component which fits in with the need of X processor.2. The path of exponent uses time-division reuse pre-adding 12bits carry look-ahead adder to calculate numbers including the difference between the divisor and dividend, decreasing the difference, and increasing the difference. And after this, choose the exponent form of the division's result according to the normal form of the quotient.3. Optimize the floating point division component, use fast conversion method into X micro-processor and convert the quotient of signed set to the standard binary complement.4. Use primary special data, boundary data, IEEE CC754 standard test vector set and enormous randomly selected data to test the whole design successfully, which verify the validity of the design.This float-division component needs 14 clocks to calculate single precision floating point division, and 29 clocks to double precision. Using the 0.13μm CMOS technology, the frequency of a clock is more than 700MHz. My research is part of the "High performance X processor" project, and this design has also been used in the project successfully...