| With the development of the integrated circuit technology and display technology, on the one hand, the scale of integrated circuits increasing soon, more and more functions are integrated on a single chip; on the other hand, the requirement of human-machine communication and control technology has developed, the technology of liquid crystal display is becoming more and more mature, all of which drive the display device and on-chip LCD controller in rapid development. At the same time, the conflict of high-resolution color display and bus bandwidth occupied has become the key aspects in embedded SoC architecture design, the requirements of reusable and low power have become stronger.Based on applications, the LCD controller research in this paper include function design, reusable design, low take up bandwidth design, low-power design. The main work and the completion of major research results are as follows.1 Definited the main function and the overall framework of the visual media embedded LCD controller, and completed the internal design of the main functions of the module.2 Introduced the concept of configurable bus interface and bus adapter, and designed configurable bus interface based on the Wishbone bus protocol and AMU's protocol, to meet the needs of reusable design, and make it the flexibility to adapt to different on-chip bus and display system.3 On the basis of analysising the origin and seriousness of bandwidth problem, we designed two structures which based on independence memory and tying up with graphics processor, and implemented the compression technology in LCD controller internally.4 On the basis of analysising several LCD display interface and signal timing, we designed two sets of output timing, in order to drive the STN, TFT LCD.The hardware logic designed in this paper is verified by simulation, FPGA and physical layout, the logic is correct, it drive STN and TFT LCD well. The design of LCD controller has embedded in EStar3 and EVMP SoC. |
PDF Full Text Request