Hardware Acceleration Design For Inertial Navigation Algorithm

Technology of Digital Signal Pocressnig is widely applied in many fields, such as communication,voice processing,computer and multimedia with the advancementdigital electronic technology.Fast FourierTransform is the core technique of DSP and performing time is shorter a few stages than DFT's.Field Programable Gate Array is a new type of programable device at high speed Development in recent years.The scale and integration of electronicdesign are being enlarged wih the continuous application of FPGA.And the method and idea of electronic system design are improved from time to time.This paper studies the implementation of FFT processor based on FPGA.It include selection and validation of the arithmetic,design of the whole architecture and modules Implementation and test of the sysetm.This design adopt the algorithm of radix- 2 and decimation in time,and realizes a FFT system of 64-point which is 16- bits complex number by using Verilog HDL at the interface of QUARTUSâ…¡provided by ALTERA Inc.The results show that the design of FPGA resources to meet the system requirements for the rational use and the speed of running to achieve the purpose of high-speed computing.Through the sinusoidal signal and triangular signal to the processor in the ModelSim simulation tests were carried out,and MATLAB simulation results with the theoretical value calculated in comparison to prove that the signal output through the FFT processor can guarantee that the theoretical frequency characteristics,and reached a deal with a certain degree of accuracy.Derived system design is practicable.