The Design And Implementation On The Hardware System Of Digital And Analog TV Hybrid Receiver To Network Streaming Senter

The purpose of the paper is to research and implement the system of hybrid network attached tuner used for terrestrial and cable analog and digital broadcast reception. The functionality is hybrid, thus either the analog or the digital reception path is active. It supports various analog and digital television broadcast standards, including NTSC, PAL, ATSC and DVB-T. And it provides interfaces for networking ,RF input ,analog audio and video base band inputs, as well as mini-PCI connector is built on the board to enable the use of wireless networking. TS outputs from Ethernet port and will be decoeded in the local PC in the user end.The design is based on Micronas Drx series multistandard demodulator and MPEG encoder SOC chip Cypher7108,which are the core chips in the system. Drx series support both analog and digital television broadcast standards, in which IFAGC is integrated. For ATSC and DVB, we will take different solutions. The Cypher 7108 is a highly integrated video/audio encoder offering high quality real time MPEG-4/2/1/H.263/MJPEG video and Dolby Digital audio streaming and capture from full D1 CCIR-656/601 YUV video sources. It interfaces with 32bits DDR SDRAM and provides kinds of peripheral units like ATAPI, Ethernet MAC, PCI, USB, I2C and I2S for user use.The decoder is in charge of resource assignation of the whole system ,TS generation, and interaction with user.The system is made out by the following main modules: Tuner,multistandard demodulator,A/V decoder, MPEG encoder, and CPLD module. The CPLD module is used to transfer serial TS to left-justified I2S data. In this paper, the design and implementation on the system hardware is fully detailed , including hardware architecture, working Principle ,SCH and layout design, CPLD code ,board bring up ,as well as test method and result.