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Research And Design Of Cache On Embedded Processor

Posted on:2010-02-16Degree:MasterType:Thesis
Country:ChinaCandidate:Q WangFull Text:PDF
GTID:2178360275497806Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
This article come from the project that is about Network Processor which is one of the projects of the School of Microelectronics of Xidian University, the paper's purpose is to design embedded processors'Cache.One of the problems of the design on microprocessor lies in its high-performance which does not match with the low access speed of main memory; it limited the performance and the efficiency of microprocessor. Although there are so many solutions to the problem, design a Cache on the microprocessor is widely used as an effective way, therefore, it is very important to design a high-performance Cache.In this paper, the main purpose of Cache design is based on the project of the design principles of the design requirements in order to achieve the basic function of Cache, on this basis, the performance of Cache should be improved as much as possible. After making full understanding of the structural characteristics of Cache, this paper design the structure of Cache in detail, which consists of 16KB I-Cache and 8KB D-Cache, and use the 32 way set associative of the CAM-RAM's structure to achieve the Round-robin query mechanisms of Cache; use the write-back method to achieve the write policy of Cache, use two dirty bits to mark the Cacheline. This paper use the full-custom circuit design on the data-path of Cache, describe the critical circuit design ideas in detail, and then simulate some circuits with Hspice so that verify whether the circuit is designed to meet the purpose of the design. This paper used the SimpleScalar software to carry on performance evaluation on Cache, configure the proper parameters and finish the simulation. The results of the performance simulation meet the requirements of the project. This paper use RTL design method on the data-path of Cache, and then together with the state transfer of Cache so that finish the function simulation of Cache, proof the correctness of Cache's function.This article finished the design of Cache, performance and function simulation, the simulation results show that the completion of the design consistent with the intended target.
Keywords/Search Tags:Cache, SimpleScalar, performance evaluation, function simulation
PDF Full Text Request
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