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The Realization Of H.264 Video Compression System Based On DSP And FPGA

Posted on:2010-02-04Degree:MasterType:Thesis
Country:ChinaCandidate:L J YeFull Text:PDF
GTID:2178360275474446Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the development and wide application of digital video coding technology, many video coding applications precepts are come up and applied continuously in which H.264 is the most efficient and most widely used codecs standard. However, compared with previous video coding technology, the advantage of H.264 is the cost of high complexity, which brings difficulty for real-time application and is the challenge for engineers. Therefore, the use of DSP and FPGA for high-speed video codec has become a hot field of video applications.DSP chip with its superior processing speed and lower power and resource consumption, has a very good performance particularly in the field of video processing. DM642 chip produced by TI which is designed specially for video image processing application is an ideal platform for H.264 codec. The parallel processing of FPGA data and algorithm has injected new vitality for highly complex real-time video codec program.This paper combining the advantages of DSP and FPGA designs the hardware platform for encoding and realizes algorithms. In the end, a real-time H.264 coding system with high capability is designed.First of all, the paper presentes a detailed analysis of key algorithms in H.264 principle by researching a lot of H.264 literature. Secondly, the author discribes his PCB design, demonstrates its hardware precept and drawes the hardware platform. Circuits'theory and design process analysis are the key focuses, which set up a good hardware platform for H.264 video encoding.In the next, the paper discusses the software design of DSP process including software design process, the bottom-chip peripherals driver programming, choice and transplantation of T264 source code and the DSP realization and optimizing. At the same time, integer transform, quantization and CAVLC entropy coding module is designed on FPGA, the realization structure and simulation waveforms of which are given. Finally, the system capability is tested. The result shows that this paper has realized the baseline profile level of H.264 and designed successfully a good real-time video coding system.The design originates from the co-operation project with some scientific research unit. The corresponding production will be used for wireless real-time video coding transmission system on unmanned aircraft. The research has important practical significance and has a certain reference value for improving real-time application of video compression.
Keywords/Search Tags:H.264, Video Capture, Video Encoding, DSP, FPGA
PDF Full Text Request
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