| With the explosion of information,information security increasingly becomes evident.The emergence of mobile harddisk makes data storage and transfer more convenient, but brings with hidden trouble of data security.Even if a login password is set,it is not very difficult to crack it.So a complete data encryption system must consists of a reliable authentication mechanism and an advanced encryption algorithm.This paper gives the analysis of AES's security and anti-attaek capability.The paper also discusses the hardware implemeniation of AES algorithm detailed,The main contents are following:1. Confirmed the design scheme,parameter,key technology.Compared to commonly used structures,the new structure in this text is suited to parallel design at a high speed.Besides,provided whole design block diagram.Because the pipelining method can't be used in feedback mode and for making the system work at a higher speed,the implementation'working mode is ECB.2. Expatiated each part of the design separately.Based on the characteristic of AES and FPGA,the implementation of subbytes,mixcolumns and expandedkey isoptimized by using the method of checking tables.At the same time,considering wide usage,designed 128bits data width and 128bits,192bits and 256bits key width of AES modules in one system.At last,finished the whole optimization.3. Coded the design and testing.Received the performance data and tested data finally. This can be further reduced the area of hardware AES through improvemenis. And it is better suited to the use of data encryption system. |