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The Real-time Image Encryption System Based On FPGA Design And Implementation

Posted on:2016-10-29Degree:MasterType:Thesis
Country:ChinaCandidate:J Y ZhaoFull Text:PDF
GTID:2308330509450875Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Today’s information age, no matter countries units and individuals, many of the important information, is to graphics, digital video images, the form of. These images video file storage and transport, inevitably, face and attack by stealing the risk of, so the image of the video files add decryption research is confidential information security research in the field of an important research direction, around the world are put into a huge engaged in the power of this theory system research and development, equipment.Information encryption and cryptography is a long history of discipline, in different histo rical period, according to different encrypted data object, need different theory and realization method.This topic for real-time video data flow, from design to achieve cost point of view, c omprehensive analysis of video streaming data characteristic and the demand of design resour ces, adopt a low-cost FPGA development board, realize the improvement of Arnold- Logistic mixed encryption algorithm, the real-time video image encryption system design and the hard ware demonstration.Paper analyzed the structure of main work includes the video transmissio n system, based on this, the design of video encryption system into three steps: the video imag e through platform construction, the video image data stream encryption module design, the s ystem each function module and system simulation in the end.The overall design work is base d on a Altera Cyclone II EP2C5Q208C8 N FPGA development board and its development env ironment.Video images through the platform, the main is to use Verilog hardware description language design implementation. First need to through the FPGA configuration of CMOS image sensor OV7670 internal register, make its output is 640 x480 pixels VGA video image data stream. Then the FPGA to capture video image data sent by correctly, and to 64 MB in external SDRAM chip in the cache. Finally extract image data from SDRAM to VGA interface driver module, drive the external display shows real-time video image, easily verified through platform, and the effect after the follow-up image processing.Video image data encryption module part, mainly adopts the model design method to implement. First in Matlab Simulink platform, call in the standard library module of DSP Builder tool box to set up the correct image encryption model. Then call Signal Compiler module converts DSP Builder model into VHDL hardware description language file, and start the Quartus Compiler integrated, layout, wiring, the resulting image encryption algorithm model script file. Finally, in the project of build a good video images through platform invoke encryption algorithm module, completed the design of the whole system.The simulation validation work throughout the entire design of each link. Each module and the system requires many times repeated design, simulation, modification of the design work,finally can obtain the stable performance, functions meet the design index system.Mainl y by Modelsim, in the design of the Quartus II and bring in the Simulink simulation tool to implement the software simulation, and through the DSP Builder in the ring test and configuration to the FPGA to implement hardware emulation.By adopting the methods of top-down design, reasonable division, the system structure and functional modules and realization of each module respectively, finally set up to realize the whole system. Finally, on a piece of the Cyclone II chip, to realize the collection of CMOS image sensor to implement real-time video image stream encryption operation.
Keywords/Search Tags:FPGA, DSP Builder, Data stream, Real-time encryption
PDF Full Text Request
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