Investigation And Design Of Charge Pump Applied To CMOS Image Sensor

As the typical size of CMOS process is scaling down, the power supply's voltage should be reduced, but some parts of the whole system may need higher voltage than supply voltage to work normally. In CMOS image sensor, a higher voltage than power supply is needed to reset MOS transistor in pixel cell, which can speed up resetting and improve the voltage dynamic range of photo diode. So, to get higher voltage than the supply voltage, a high voltage generator system is needed specially. Charge pump, which utilizes capacitors to accumulate charge, is a high voltage generator circuit.The proposed charge pump in this thesis is used to reset MOS transistor in pixel cell of CMOS image sensor. Namely, higher voltage which charge pump produces drives analog switch to turn on or off effectively. On the basis of analyzing work principles of many kinds of charge pump and comparing their advantages and disadvantages, a switch capacitor charge pump using two stages of voltage doubler is adopted in terms of requirements of CMOS image sensor. And this thesis gives detailed analysis about all kinds of factors affecting charge pump and a theoretical model of charge pump. Then on the basis of charge pump model and requirements of CMOS image sensor, module circuits including bandgap, oscillator, non-overlapping clock generator and voltage buffer are designed and verified with Tower 0.18um CMOS process. Finally, simulation of the whole system indicates that voltage is step up from 1.2V to 4.2V with settling time less than 10us and voltage ripple less than 6mV. So the proposed charge pump in this thesis has good performance.In order to reduce the complexity of charge pump system, the proposed charge pump system does not utilize any feedback circuit. However, the proposed charge pump system charges two capacitors with fixed ratio in one half of every clock cycle and distributes charge renewedly in the other half of every clock cycle. Thus the output voltage is stabilized. Because of distribution of charge in every clock cycle, the system wastes some power, but the wasted power can wholly counteract the power which the added feedback circuits consume. This is original in this thesis.