Design Of Interface And Communication For SAR Imaging Signal Processor

Synthetic aperture radar (SAR) real-time signal processing technique is developing rapidly and its performance has been improved dramatically with the development of digital technology, the enhancement of signal processing capability and the parallelization of imaging algorithms. The overall trend is towards miniaturization still with high performance and lower power consumption. Since the high resolution imaging radar has the characteristic of large data and high computational load, it requires signal processor has a powerful capacity of communications and computing. Block design idea is often used in the actual realization, combined with standard or self-defined bus to achieve high speed data transmitting between circuit boards. This paper, starting from the whole architecture design of the real time processing system, briefly analyzes the hardware design, discusses the the problem of data communications and gives an introduction of hardware desing of the memory board and the signal processing board first. Then the main function, technical performance and theory analysis of the interface board are presented, with a detailed description of its hardware circuit design. Successively, a large-scale logic design of the interface board based on FPGA is investigated, including the workflow of the system hardware, the chip configuration and use, the data exchange between the system boards and the azimuth pre-processor design. Finally, some conclusions are drawn.