The Universal Verification System Of Flash Memory Based On FPGA

Verification and test of chip is a critical part for the research and development of chip.The fund ratio of the verify part account for a large proportion of the entire development also increased year by year. With the development of integrated circuit technology,more and more problems emerge in the memory chip design and manufacture during design and production,which related to the feasibility of the whole design. In this paper, developed a universal test platform based on FPGA for the verification of Flash chips, the main contents is listed as following:1. Have discussed the feasibility of the development of this verification system, analyzes the development status both domestic and overseas in this area.2. To study the basic principles of Flash memory testing, including fault model and testing algorithms of chip, introduces the structure of6Mb NOR FLASH memory chips to be tested in this paper, explicitly the validation purposes and goals of the system.3. In this article described the design of the universal verification system based on FPGA in detail, which mostly about hardware design.Introduces ideas and precautions. Using Cadence and Altium Design10completed the design of each module.Mainly includes peripheral circuit design of FPGA, circuit design of power supply and the upper interface board.4. Finally, test the6Mb chip in laboratory with the verification system which works well, and combination of all test data to verify the correctness of the chip.The system has two main characteristics:First, the system selects the FPGA chip which can be embedded MicroBlaze core, equivalent one FPGA implementation the functions CPU and FPGA; There is also earmarked219FPGA10port for connecting test chip, using the upper interface board design, the purpose is to achieve the universal functions for different chips which only need to modify the upper interface board circuit and FPGA internal procedures that shorten the development cycle and costs.