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Simulation And Implementation Of Channel Coding In The Upstream Over DOCSIS

Posted on:2008-12-24Degree:MasterType:Thesis
Country:ChinaCandidate:Z R ZhangFull Text:PDF
GTID:2178360272968031Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
DOCSIS1.1 data transmitting interface specification is formally published by MCNS(Multimedia Cable Network System) in March 1997. This standard is designed to give a various applications, such as Broad Band, high- quality voice, material services for commerce and multimedia services by sharing Cable Modem in network etc. Therefore it is concerned growingly by the industry. As the DOCSIS standard offers services by using CATV network, and DOCSIS makes use of upstream channel in TDMA mode and allocates it by"request-grant"mechanism, so there is a series of technical difficulty. Aiming at this problem, this paper researches the coding system of the upstream channel.Firstly, the developments of DOCSIS are introduced. Then, the already developed 802.14, DVB and DOCSIS 1.x/2.0/3.0 series standards are recalled and compared. Broad Band and high bit rate in upstream channel, which are the DOCSIS standard different form other standards. This paper introduces the main technologies of upstream channel and researches the channel encoding deeply.The DOCSIS system involves three kinds of channel encoding technology, which are randomization, RS encoding and convolution interleaving. After farther research on the principles and traditional realization algorithms of these coding technologies, a system based on FPGA+MCU is proposed. This platform optimizes high-speed data pipeline so that satisfies the system request of real time through fully using the resource of the chip. The system architecture and module design were described in detail.This paper applies for the simulation tools of software and hardware, such as Matlab, Quartus II and ModelSim, to verify the whole function of the circuit.FPGA is kernel device in the channel encoding system. Finally, this paper presents the debug flow and some advices of FPGA debug improvement.
Keywords/Search Tags:DOCSIS, channel encoding, randomization, RS encoding, convolution interleaving, FPGA
PDF Full Text Request
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