The Design Of Double CPU System In FOG Strapdown Inertial Navigation

The emergence and development of strapdown inertial technology represent a new direction of development modern inertial technology, and now fiber optic gyro inertial navigation system has become a hot research about inertial technology. This system is small and requires large amounts of data real-time solution, so the design of the rapid and real-time of SINS system is very important. According to the above features and system requirements, we design the strapdown navigation system formed by SOPC+DSP. SOPC is a flexible, and efficient SOC solution, and it is flexibility of design and short of development cycle. DSP's specific hardware architecture is very suitable for large data processing algorithm needs to be done. It has highly-efficient, high-speed, precision and so on. Therefore the architecture of SOPC + DSP is very suitable for the design of strap-navigation system.Firstly, the paper introduces the element theory of the FOG and the Strapdown Inertial Navigation System and the theoretical base of the systematic design. Secondly, it completes the design of hardware and partial software in the embedded system. The hardware design is the focus of this paper. FPGA is the hardware carrier of SOPC. The hardware platform of system is made up of FPGA and DSP, FPGA complete the control of the entire system and DSP concentrates to the SINS algorithm solution calculation. System software includes the design of the FPGA and DSP bottom software and the counting procedures of SINS. Lastly, the problems in the system debugging are analyzed and the system is tested practically to verify the correctness and reliability of data collection and transmission.