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A Brief Study On The Systematical Structure And Pivotal Techniques Of A Micro-INS Integrated Navigation

Posted on:2010-01-04Degree:MasterType:Thesis
Country:ChinaCandidate:Y LuoFull Text:PDF
GTID:2178360278957200Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the rapid development of navigation technique, it is increasingly applied to civil and military fields, and it also has become the attention of research in the world. Nevertheless, single-navigation technique has many tough shortages, so it is the research trend to conquer these barriers and integrate their advantages, among which integration and application of Inertial Navigation and GPS Navigation is the most popular. In addition, our military is still equipped with many conventional weapons, which are less effective in combat. If all of the weapons were discarded, it would produce massive wastage. Therefore, the development of a brand new Micro- INS CMOS Chip is in urgency and magnificent for it can greatly lessen the cubage of computer, power and wastage, simplify its complexity and improve reliability. And it would reform the Conventional weapons of their guidance. This article is a response to this train of thought, presenting an initiative research on the development of the Systematical Structure and Pivotal Techniques of Micro- INS CMOS Chip.Beginning with existing navigation and Integrated Navigation, this article presents the popular integrated navigation techniques and their principium. The author conducts an in-depth statement on information-integration and chip-design. The following part is about a research of Strap-down inertial navigation system and its classical algorithms, including several classical algorithms, speed, location algorithm, navigation filter. And it takes advantages of C programming language to implement a purely inertial navigation algorithm, giving an analysis and assessment of the demand for calculation. Moreover, it analyses the whole system of Navigation computer overall, including structural characteristics, solver features, strengths and weaknesses, etc. At last, the author conducts a research on pure inertial navigation, as well as navigation of the simulation analysis, which demonstrated that the algorithm can achieve the accuracy and precision requirements. It offers a sound basis for the following-up work.With a sound theoretical and practical foundation mentioned above, the author draws a conclusion which could meet the needs of new systematical structure, and an analysis of its principium. It contributes a solid foundation for the following task, in order to achieve small size, low power consumption, high reliability.
Keywords/Search Tags:SINS, Integrated Navigation, Veneer Computer, FPGA, SOPC, IP core
PDF Full Text Request
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