Research On Encoding Compression Technology Of Test Data

System chip SoC is currently the development tendency of the international VLSI and the mainstream of development of the integrated circuit in the new century. SoC has the unexampled advantages whether in development period or in system functions and performances. At the same time, with the increase of IP Cores, the functions of SoC are becoming more and more complicated, and the test data volume and test power consumption are sharply increasing, and test cost becomes more expensive, thus the greater challenges occur in SoC test. For this reason, the research is focused on the test data of SoC in the thesis and the new compression /decompression technologies are proposed to reduce test data volume, test time and decrease hardware overhead and test power consumption as much as possible.As an important branch, encoding compression technology has been widely used. In this thesis, some typical encoding technologies are analyzed, although their compression rate is very high in some cases, the compression rate of long run-length encoding is not perfect. Aimed at this problem, encoding prefix mapping and the recoding compression method of long run-length are presented in the thesis.Firstly, in the thesis the challenges in SoC test, the concepts concerning SoC test, system chip SoC and the fundamental concepts of IP and the fundamental requirements of SoC test data compression are discussed in detail. Next, compression technologies of SoC test data are focused on, some typical encoding compression technologies are discussed in detail and the respective advantages and disadvantages are analyzed. Based on this, compression method of encoding prefix mapping is proposed, by means of one-one mapping among the prefixes, the average length of prefix of encoding becomes the shortest. Finally, the recoding compression method of long run-length is proposed, its main idea is as the following: firstly, the test vectors are preprocessed as the following: the filling treatment of the X bits and compatible mergence of test vectors, sorting of test vector and the difference transforming of test vector, by means of these preprocessing the volume of test vectors is reduced, the rate of 0 and the rate of long run-length are increased greatly, after preprocessing difference vectors are decoded at the first time, and then the encoding of long run-length are recoded at the second time. Decompression algorithm and the corresponding decompression circuit are given in detail in the thesis. The decompression circuit is simple and hardware overhead is small. The experimental results showed that the compression rate of this method is obviously higher than those of other encoding methods.