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Hardware Implementation Of Encryption And Decryption Tunnel Of Network Data

Posted on:2008-12-26Degree:MasterType:Thesis
Country:ChinaCandidate:X H LiFull Text:PDF
GTID:2178360245992029Subject:Circuits and Systems
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The security of data and information transmitted on the networks is becoming more and more important with the networks is becoming more opening and more sharable. Internet Protocol Security (IPSec) is widely used to prevent the networks from attacks and intrusions. It can solve the network security problems effectively. Software-based implementation of the IPSec Protocol is very sophisticated and can take up a lot of CPU resources, because it will take a lot of time to perform complicated cryptological algorithms. In addition, it can not satisfy the order of speed.We can implement the encryption algorithm using software or hardware. Encryption is one of the basic security methods of data confidentiality. But encrypting packet with software not only occupies the resource of CPU, but also degrades the performance of network. Thus the study of the realization of encryption with hardware in the network card is very important. The hardware-based implementation is fast. It has high security. It's easy to deal with the data parallel. And it has good real-time characteristic. So the hardware-based implementation of AES algorithm is the hot research point in our country and overseas.The thesis at first gives the basic knowledge of cryptography and IP Security protocol, and then gives the basic concept and principle of computer network, and summarizes its Standard Reference Model. We implement the encryption algorithm (AES) with special hardware and put forward a method to solve the security of the network data. We integrate the encryption/decryption and encapsulation/ decapsulation on the network interface card. Decapsulate the data package to be transmitted, encrypt and encapsulate it. Then send it to the transmitting buffer. Encapsulate the data package to be received, decrypt and decapsulate it. Then send it to the receiving buffer. In this case, the network interface card can be fully used. And we can implement encryption/decryption on hardware farthest.
Keywords/Search Tags:IPSec, AES algorithm, Network Interface Card, FPGA, VHDL
PDF Full Text Request
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