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Design Of Multi-Channel DMA Controller IP Core On FPGA

Posted on:2009-01-13Degree:MasterType:Thesis
Country:ChinaCandidate:Y F LiuFull Text:PDF
GTID:2178360245975550Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
At present, with the rapid development of electronic technology, the intelligent systems require increasing amount and growing fast of data transmission. The traditional transmission methods have been unable to meet current demands. Base on these reasons, it is necessary to adopt the high-speed data transmission technology. DMA(Direct Memory Access) technology is one of the best solutions which could meet the requirements of real-time and accuracy for information processing.Depending on EDA tools, hardware description language and programmable logic devices(FPGA), the paper develops the whole frame for DMA controller. It resolves signal anti-jamming and request signal revocation and proposes parallel channel test method in channel test module, as well as proposes dynamic priority response method in priority management module and adopts state machine to design data transmission for multi-channel in transmission module. Through resolving the problems in each module and adopting new methods, finally, the IP core is developed for multi-channel DMA controller on FPGA. The simulations show that the controller works fast and the clock can reach beyond 100MHz. At the same time, it runs well in actual operation.
Keywords/Search Tags:Direct Memory Access, IP core, EDA tools, Hardware Description Language, FPGA
PDF Full Text Request
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