Front End Of DVB-S Channel Demodulation And Decoding Of ASIC Design

Digital TV will be very popular in the near future years,while the design of these DTV Integrated Circuit(IC) is one of the most popular aspect in the digital IC design field. This paper provided a way to design the channel decoding IC of DVB-S system based on the up down digital IC design flow.This paper worked out the detailed logic design and HDL(hardware description language) description of each module in DVB-S channel decoding system, verified the HDL functional description and timing reqirement using Modelsim simulation tool and FPGA. This paper also introduced the ASIC synthesis and place and route flow base on the specified ASIC vendor's semiconductor library.