Application Of Scilab/Scicos In SW/HW Codesign

Morden electronic systems grow in complexity, at the same time, designers meet demands for shorter development time and lower development costs. This incites the use of Hardware / Software Codesign. It is the cooperative design of hardware and software, that simultaneously handle both hardware and software, for modeling, partitioning, verification and synthesis of the complete system. The aim is to improve system design quality and designers' productivity.In this paper, the idea of expanding Scilab/Scicos, a free mathematical modeling software, into a hardware/software co-design tool is delivered. Developed at INRIA, Scilab ( Scientific Library ) is used for system control and signal processing applications. It is freely distributed in source code format. Scicos (Scilab Connected Object Simulator) is a Scilab package for modelling and simulation of dynamical systems including both continuous and discrete sub-systems. Although it is based on the needs of control system, when expanded, this visual block diagram language can be a friendly used behavior model description tool and applied to system co-design techniques family.For this goal, firstly, some libraries are added to Scicos. For example, fixed-point arithmetic library. Secondly, a Builder is developed to convert Scicos blocks diagram behavior description to VHDL architecture description, which can be used directly by other logic synthesis tools or be further optimized. With this tool, the user need only verify the system model, since the VHDL is automatically generated.Scicos is the tool choice because of the wonderful interface provides the possibility of defining new functions, function libraries and blocks using C Language. And Scicos free-software open-source policy should help in creating a community of contributors to the project.