Research On Software/Hardware Codesign Optimization On Reconfigurable MPSoC

Multiple processors system on chip(MPSoC),which has integrated various types of computing resources such as MPU,DSP,etc.A computing platform combines reconfigurable technology with MPSoC,which ensures the effectiveness and flexibility of computing performance,and satisfy different application requirements.According to the characteristics of the task,reconfigurable MPSoCs can reconstruct and assign tasks to the most efficient computing resources.Aimed at optimizing computing performance,this paper researches on software/hardware codesign optimization of reconfigurable MPSoC,including the software/hardware partitioning,automated synthesis of heterogeneous interconnect topologies,run-time task graph extraction for dynamic scheduling,etc.Efficient techniques for HW/SW codesign is necessary to realize embedded systems that must meet design constraints and satisfy the shorter time-to-market pressures.The current software/hardware codesign optimization on reconfigurable MPSoC still faces many challenges:(1)Software/hardware partitioning algorithms are easy to fall into local extremes,and the partitioning results have low accuracy for large size task graphs;(2)How to generate a ‘customized' on-chip interconnection model associated with application communication requirements;(3)Run-time optimization problems caused by differences of reconfigurable MPSoC.In response to the problems above,this paper relies on the National Basic Safety Basic Research Program-‘A Radar Key Technology Research',the main research results are as follows:1.To solve the problems that software/hardware partitioning algorithms are easy to fall into local extremes,and the partitioning results have low accuracy for large size task graphs,a memoryreinforced tabu search algorithm with critical path awareness(MTSP)for HW/SW partitioning is proposed,based on the analysis of task dependencies and task communication cost.First,the critical path(CP)algorithm can locate the critical task queues and output a reduced task graph.Second,the solution to a heuristic algorithm(HA)is used as the initial solution.Third,by introducing hash technology,adding dual memory tables improves the search strength and effectiveness of the tabu search,and the simulation is completed by priority scheduling.MTSP has a fast solution speed and is stable in scenarios with large size task graphs or large communication calculation ratio.2.Aiming at the generation of task-specific interconnection model,based on the analysis of task communication constraints and hardware resource utilization,an application-driven heterogeneous interconnections structure including shared buses and crossbars is proposed.Three levels of communication parallelism are considered: global parallelism across different independent domains,where cores of frequent communication are grouped into different regions with the clustering approach algorithm;local domain parallelism,where the network realizes application-driven partial crossbars through an intradomain topology algorithm;and interdomain parallelism,where multiple concurrent paths across different local domains are exploited.The input of the algorithm is the application communication requirement.Using three parallelisms,the algorithm automatically generates an interconnection structure,which has lower communication delay and energy overhead,interconnections structure has high flexibility.3.For the real-time optimization requirment caused by the differences of reconfigurable MPSoC,task graph extraction and online scheduling method based on MPSoC is proposed.First,task execution information is extracted through the feature phase vector,and then the cycle is identified.Second,dependency relationship is extracted through the status word to generate the task graph.Third,a non-cooperative game theory-based approach is used during the scheduling.This algorithm identifies the repeating phase during the execution of the application and extracts the repeated phase graph.Otherwise a non-cooperative game theory-based approach is used during the scheduling.This schedule method iteratively improves on the previous schedule to obtain a smaller schedule length.Run-time scheduling combined with the characteristics of different MPSoC platforms provides portability and can cope with differences of task execution.Software development does not require knowledge of the underlying hardware.The simulation results show that the algorithm has high real-time performance,at the same time,the code size of the algorithm is small so it is easy to integrate into the MPSoC with limited resources.