The Design Of 16 Bit∑△ADC

∑△ADC technology is based on over sampling, noise shaping and decimation filtering.∑△ADC exploits the enhanced speed and circuit density of modern VLSI technologies and overcome limitations on resolution that result from the component mismatching. Also, due to its digital nature∑△ADC can be integrated onto other digital devices and its manufacturing technology is not special. So the cost of implementation is low and will continue to decrease.The design method of∑△ADC is researched systematically and a 16 bit∑△ADC which is used in high quality audio device is designed.∑△ADC is consisting of modulator and digital filter. In the design of modulator, the structure of 64 OSR, 5 order, single bit, distributed feed ford and local feedback is proposed by comparing with other structures and optimizing the NTF transfer function. The non-ideal factors which will infect the performance of modulator are analyzed in detail as well. The whole circuit of modulator is given then. The factors which will be encountered are descried and modules include anti-aliasing filter, clock circuit, band gap voltage reference, SC integrator, latched comparator and DAC are designed.The transformable stage non-recursive comb filter architecture is proposed by amending and optimizing the recursive comb filter on the base of decimation filter theory. A 52 order FIR compensated filter which is used to correct the droop in the come filter pass band is also proposed. Then, the circuit implementation and clock scheduling are descried in detail.The whole circuit of∑△ADC is given at last. The simulation result is based on the 0.5μm CSMC technology by Spectre in the Cadence testify the SNR of modulator reached 115 dB and leave the enough noise margins for digital filter. According to the results of simulate the test file of digital filter circuit by using Verilog-XL in Cadence. The circuit meets the requests of exact scheduling and correct data. According to the result of simulate the whole system by using Simulink in Matlab. The SNR of ADC reached 99 dB and the ENOB reached 16.20 bit.