Research And FPGA Implementation Of LDPC Codes Encoder For Digital Television Broadcasting System

Ever since the foundation of "information and coding theory", by Claud Shannon in1948. the channel coding technology has become an indispensable and special branch in modern communications after 60 years of development.Different kinds of codes come out and now we focus on the LDPC code,an excellent error-correcting code with performance close to the Shannon limit, which is widely applied in many fields,such as: digital television, wireless communication and magnetic recorders.Now digital television is the one of the most popular topics and it is every Chinese dream to watch bei jing Olympic Games by mobile telephone.Two communication standards with relations to digital television have been released,so digital television is getting closer and closer to everyone.In 2015 only digital television service is available and all the analog TV service will be shut down. As one of the core technology in digital television,FEC ,especially the FEC chip,has been the hot research topic in many research institutions. The LDPC-BCH concatenated codes is used as the FEC in DMB-TH standard and DVB-S2 standard,while in CMMB standard the LDPC-RS concatenated codes is used.This paper analysised and researched the LDPC code in three most important communication standards:DMB-TH,CMMB and DVB-S2.and had FPGA implemented encoders of DMB-TH and CMMB.An LDPC code encode algorithm based on the new LU factorization was proposed.,which was used for arbitrary H matrix. The logic function of the chip was correct , the resource consumption and the rate met the requirement of the communications standards.