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Research Of Applying Boundary-Scan Test Technology In Remote Experiment System

Posted on:2008-12-04Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhaoFull Text:PDF
GTID:2178360242988875Subject:Computer application technology
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What does education practice's radical change in the rapid changing world? It is open and innovation. As long as talking about the education reform, the distance learning is an important aspect and has come to force without doubt. It has played an important role as a new education pattern. In modern distance learning, how to make the experiment teaching be creative, open and fit to the theory curriculum?The remote computer hardware experiment system is brought forward and realized in the paper, which is developed to enable remote FPGA-based computer hardware experiment curriculum. The system aims at structuring a new mode of computer hardware experiment with open and networked form. Remote experiment system is supplementing effectively theory teaching, resolving the problem that in the distance learning, experiment teaching is not adaptive for theory teaching.Because FPGA is reconfigurable, using FPGA-based computer hardware experiment device, experiment content has changed from verification type, comprehension and design type to creative type. The designer can modify and change the circuit structure according to the need over and over again, which helps to stimulate students' creative thinking. In recent years, FPGA has found a rapid increase of application in computer hardware curriculums at more and more universities.In the research of making the FPGA-based experiment with the mode of "design-configure-verify" into networked pattern, how to configure and test the FPGA from remote are two crucial problems the article concerned about. The paper proposes applying boundary-scan technology which is widely used in the domain of test to the computer hardware experiment to resolve the two crucial problems of configuration and test.Boundary-scan technology is a kind of Design-For-Testability method, which involves the inclusion of a boundary-scan register adjacent to component boundaries so that each component pin can be controlled and observed using scan testing principles. The applicatoin of ISP (In System Programming) technology has increased the popularity of boundary-scan technology in FPGAs. Nowadays, all the manufacturers support the IEEE Standard 1149.1.There are no precedents in the world applying boundary-scan test technology to the experiment system. The paper contributes to study on the FPGA boundary-scan configuration mode and algorithm, study on the INTEST instruction for function test, and study on how to apply boundary-scan technology to remote computer hardware experiment system. Whether is theory studying or programming and debugging all prove that the method is feasible. The paper further realizes a hardware accelerate boundary-scan controller to improve the performance of the remote experiment system. The controller can realize the process of "configuration" and "verify"automatically without the control of CPU. The controller's operation in the remote experiment system can reach the expected goal. By performance analysis, we conclude that hardware accelerate boundary-scan controller is significant faster than that realized with software.
Keywords/Search Tags:boundary-scan test, FPGA, remote experiment, boundary-scan controller, hardware accelerate, state machine
PDF Full Text Request
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