Design And Implementation Of High Density Circuit Board Test Controller Software Based On Boundary Scan

The update iteration of electronic component products and the scale integration of integrated circuits are constantly upgrading.The unmeasured points in chip packaging continue to increase,the miniaturization of integrated circuit devices is complicated,and the electronic testing becomes more complicated.The combination of boundary-scan technology and other testing techniques can effectively carry out reliable feasibility testing of electronic systems.Domestic theoretical research and practical testing are in the stage of exploration and development.This technology is an important direction of electronic testing technology and is irreplaceable in the full-cycle maintenance of complex electronic products.Researching boundary scan test technology and developing test controller system have positive practical significance.In the design and development of this paper,the hardware is developed based on the Xilinx ISE platform using Verilog language.The software is developed based on the Visual Stadio platform using the MFC framework using C++ language.In the data interaction design,the serial port we used in the hardware circuit test is used as the interface for communication with the host computer.The software design uses the usb2.0 interface to communicate with the host computer.The main control board and the board under test are connected through the JTAG interface.By reading the IEEE 1149.1 standard document,boundary scan test related books and documents,learn to explore the principle of boundary scan test and its development and application.In the boundary scan test technology,the TDI signal flow is controlled by the TAP controller to select the serial instruction register in the tested chip,and after decoding,the instruction is transmitted to the corresponding register in the parallel data register to obtain feedback data in the TDO.In the Modelsim logic simulation,the generated testbench file is used to realize the simulation logic test by setting the clock and corresponding time nodes.In the hardware test analysis,the basic hardware implementation logic is basically described based on the IDcode test in the specific BSDL and the state transition principle of the TAP state machine.In the hardware test analysis,the successful test of IDcode can verify the completeness of the circuit and the integrity of the chip.The real-time pin simulation of the chip can diagnose the state of the tested chip.In addition,we also conduct joint testing of multiple chips and perform multiple tests on a single chip.In the software development design,the MFC convenient UI design can quickly and effectively complete the design of the software interface framework,and a large number of classes and modules are used to implement the corresponding functions of the test software.The boundary scan file contains the basic information of the boundary scan test.Through the structural analysis,we set up the BSDL processing module in the software development to read and save the chip information.The netlist file describes in detail the connection relationship between the components of the board on the board.Through the structural analysis,we set up the NetList module for software description.Through the structural analysis of the boundary scan file and the netlist file and the software language description combined with a certain algorithm,the basic test of the analog pins of the chip,the basic test of the boundary scan and the preliminary interconnection test are realized.