Research And Realization Of Function Model For CAM

As the Internet develops so quickly, the data flow in the network becomes bigger and bigger, and the business requirement for the network is very much different from before. Hence, it post a great challenge in designing the hardware units of the network, such as routers, gateways, and so on. The feature of high speed for CAM and the wide use of FPGA has make the combination of them a key solution to implementing the high-speed route and packet switching, IDS, and so on.The research and realization of function model for CAM expands the library for periphery chip used for function verification in FPGA design, facilitate the process of function verification and shorten the development period of FPGA.The main tasks and the innovations in this paper are listed below:1. We analyze the existing methods and the main process of function modeling and expatiate on the process of logic test of FPGA design and the methods of device function modeling in the logic test of FPGA design.2. We propose a frame for CAM's function model after analyzing the CAM in detail. Then, we particularly studied some popular searching arithmetic which was the core part of CAM's function model and used a lot in search engine for enhancing the performance of high-speed searching engine.3. We bring in and implement three function models, including sequential search engine, Hash-function search engine and Tree-leveled search engine .4. In this paper, we analyze and compare these three function models theoretically and summarize the advantages and disadvantages between them.5. We implement the sequential function model for CAM in Verilog and use the Modelsim to simulate to assert the correctness of this model, which is applied in the logical function verification of CIA card.In a word, we conduct a lot of study into the design of function model for CAM. And our achievement makes real sense in the design of FPGA.