Design Of High-speed Low-power Divider Based On SiGe BiCMOS Technology

There is a great improvement in wireless communication now, how to design a kind of frequency divider with low power and high frequency has become an important work. It is treated seriously in this dissertation by summarizing many people's work.The high speed divider is one of the critical components in PLL frequency-synthesizing; it is a feedback block in RF PLL. The input signal of the divider is in GHz range and its output signal is in low frequency range. The high speed divider is one of the great power dissipation parts in PLL. So a low power dissipation divider is important to the PLL frequency-synthesizing.In this paper, first, a brief introduction of frequency divider is given. Many kinds of the divider's structure are summarized and compared simply. In addition, the most important cell of the divider—divide-by-2 cell is introduced. There are several structures of divide-by-2 cell. The divide-by-2 cell with differential BiCMOS flip-flop has been chosen for the design.According to the summary and study of frequency divider structure, this paper designed a low power, high speed divider. It is used in PLL frequency-synthesizing. This paper focus on analyzing the design process of each module of the frequency divider. Each modules of frequency divider has illuminated detailed, such as prescaler, programmable divider and so on. The prescaler located at the front end of the feedback loop, whose function is to divide the high frequency input signal, to facilitate the following operation; the programmable divider's function is to determine the entire frequency divider's frequency divisor, so that the frequency divisor can be controlled. In this design, the frequency divisor of the double-modulus prescaler divider is 8/9; the input of the programmable divider is 6 bits.In the design process, some new ideas about the frequency divider's structure has been put forward under the actual conditions, and to be proved effective through simulation. For example, when the prescaler's logical control gate is designing, I reduce several logical gates to one logical gate according to the actual conditions, enhance the performance.of the divider.JAZZ 0.35μm SiGe BiCMOS technology is used in this design, which application goal is RF, analog and mix signal IC. The circuit is stimulated by Cadence Specter RF. The simulation results shown that the divider can work well between the temperatures-55℃～125℃, source voltage 2.7V～3.3V. The highest work frequency is 4.8GHz, theprescaler dissipation current is 5.5mA, and the programmable divider dissipationcurrent is 1.7mA.